mitsubishi integrated circuit M64283FP image sensor (artificial retina chip ) 1 / 35 specifications and information in this document are subject to change without notice. ver. 2. 2. 3 07/22/1998 semiconductor technical data mitsubishi 1. overview M64283FP is a cmos image sensor of 128 128 pixels, which supports a n image- processing function and an analog signal calibration , a device that allows information compression and parallel processing like human retina . M64283FP can achieve high performance, a compact system and low power consumption for an image-processing apparatus. 2. features u single 5.0 v supply voltage u low power consumption (typically 15 mw) u positive/negative image output modes u edge enhancement and edge ext raction output modes u vertical/horizontal projection modes u random access mode u gain level adjustment mode 3. application image capture device s , game machine interface devices , pc peripherals and any other consumer electronic s devices pvdd star outline: 16c9-b pin layout (top view) strb sin dvdd dgnd load xrst xck agnd avdd vout pgnd tadd read reset
mitsubishi integrated circuit M64283FP image sensor (artificial retina chip ) 2 / 35 specifications and information in this document are subject to change without notice. ver. 2. 2. 3 07/22/1998 semiconductor technical data mitsubishi 4. block diagram figure 1. block diagram control logic pixel array 128 x 128 dark pixel unit pixel scan direction horizontal control circuit level control gain control edge control 1 2 3 4 5 6 7 8 9 15 14 13 12 11 10 16 1 1 1 3 start strb sin agnd2 avdd2 avout dvdd dgnd xrst xck load avdd1 agnd1 tadd read reset
mitsubishi integrated circuit M64283FP image sensor (artificial retina chip ) 3 / 35 specifications and information in this document are subject to change without notice. ver. 2. 2. 3 07/22/1998 semiconductor technical data mitsubishi 5. pinout pin no. name pin function description 1 start start digital input image capture start signal pulled down internally by 50 k w 2 strb strobe digital output strobe signal for data output 3 sin data input digital input register data input pulled down internally by 50 k w 4 dvdd digital power supply power supply for control logic unit 5 v 5 dgnd digital ground ground for control logic unit 6 load data set digital input validate register data input pulled down internally by 50 k w 7 xrst logic reset digital input reset of control logic unit pull up by 50 k w low active 8 xck system clock digital input system clock pulled down internally by 50 k w 9 reset register reset digital input register reset pull ed up internally by 50 k w low active 10 read data output timing digital output indicate data output timing 11 tadd test enable /register address digital input test mode enable and register address msb pull ed up internally by 50 k w 12 agnd1 analog ground analog ground of pixel analog unit 13 avdd1 analog power supply analog power supply of pixel analog unit 5 v 14 vout data output analog output image signal data output 15 avdd2 amplifier power supply analog power supply of analog unit 5 v 16 agnd2 amplifier ground analog ground of analog unit 1 8 16 9
mitsubishi integrated circuit M64283FP image sensor (artificial retina chip ) 4 / 35 specifications and information in this document are subject to change without notice. ver. 2. 2. 3 07/22/1998 semiconductor technical data mitsubishi 6. image format parameter specifications optical size 1/4 " number of valid pixels 128(h) 128(v) number of total pixels 130(h) 132(v) image area 3.07 mm 3.07 mm pixel size 24 m m 24 m m optical black horizontal (h) - 1 pixel at the back. vertical (v) - 3 pixels at the front and 1 pixel at the back 7. absolute maximum rating symbol parameter value unit dvdd digital power supply 7 v avdd1 analog power supply for pixel unit 7 v avdd2 analog power supply for amplifier 7 v v i logic input voltage* -0.3 to vdd v t opt ambient operating temperature -10 to +55 c t stg storage temperature -20 to +80 c * the digital input pins are start, sin, load, xrst, xck, reset and tadd. 8. recommended operating conditions symbol parameter minimum typical maximum unit t opt ambient operating temperature 0 25 45 c dvdd digital power supply 4.5 5.0 5.5 v avdd1 analog power supply for pixel unit 4.5 5.0 5.5 v avdd2 analog power supply for amplifier 4.5 5.0 5.5 v v ih "h" logic input voltage* 2.2 dvdd v v il "l" logic input voltage* 0 0.8 v f xck system clock 50 500 1000 khz * the digital input pins are start, sin, load, xrst, xck, reset and tadd.
mitsubishi integrated circuit M64283FP image sensor (artificial retina chip ) 5 / 35 specifications and information in this document are subject to change without notice. ver. 2. 2. 3 07/22/1998 semiconductor technical data mitsubishi 9. d.c. electric al characteristics symbol parameter minimum typical maximum unit v oh "h" digital output voltage* 4.5 dvdd v v ol "l" digital output voltage* 0 0.5 v i out analog output current rating** -100 100 m a r o analog output resistance** 100 w di dd digital circuit current 0.5 ma front view image 2.5 ma analog circuit current two-dimensional edge (50%) 3 ma ai dd vertical/horizontal projection 4 ma * the digital output pins are read and strb ** the analog output pin is vout 10. electro-optical characteristics ( ta = 25 c) symbol parameter condition minimum typical maximum unit image capture illumination (at image capture face) 1 5000 lx variable range of exposure time 16 m 1 sec frame rate* 1 30 fps s sensitivity condition 1 10 mv/lx msec v sat saturation power voltage 1000 mv v o average typical power (tbd) mv v drk dark signal (tbd) mv shv o light shading (tbd) % shv drk dark shading (tbd) % smr smear (tbd) % condition 1. halogen light source is used. infrared filter is not used . g ain setting is 04h (ten times). * 1fps is for exposure time up to 1 sec. 30fps is for exposure time 1msec or less.
mitsubishi integrated circuit M64283FP image sensor (artificial retina chip ) 6 / 35 specifications and information in this document are subject to change without notice. ver. 2. 2. 3 07/22/1998 semiconductor technical data mitsubishi 11. a.c. electric al characteristics symbol parameter target value unit minimum typical maximum t cr xck cycle time 2 - - m sec t whx xck pulse width ("h" level) 0.8 - - m sec t wlx xck pulse width ("l" level) 0.8 - - m sec t r xck rise time - - 0.2 m sec t f xck fall time - - 0.2 m sec t ss sin setup time 0.4 - - m sec t hs sin hold time 0.4 - - m sec t sl load setup time 0.4 - - m sec t hl load hold time 0.4 - t wlx -0.4 m sec t whl load pulse width ("h" level) 0.8 - - m sec t sxr xrst setup time 0.4 - - m sec t hxr xrst hold time 0.4 - - m sec t sr reset setup time 0.4 - - m sec t hr reset hold time 0.4 - - m sec (a) xck/sin timing xck sin 75% 25% t whx t wlx t f t cr t ss t hs t r
mitsubishi integrated circuit M64283FP image sensor (artificial retina chip ) 7 / 35 specifications and information in this document are subject to change without notice. ver. 2. 2. 3 07/22/1998 semiconductor technical data mitsubishi (b) xck/load timing (c) xck/xrst/reset timing (d) xck/start timing xck t whl t hl t sl load xck t sxr t hr t sr xrst reset t hxr t hst t sst xck start
mitsubishi integrated circuit M64283FP image sensor (artificial retina chip ) 8 / 35 specifications and information in this document are subject to change without notice. ver. 2. 2. 3 07/22/1998 semiconductor technical data mitsubishi 12. description of function 12.1. image c apture procedure figure 2. operation flow chart image capture is executed according to the procedure in fig. 2 . first, reset all the registers of the chip, and then program the registers. to reset the chip, set both xrst and reset to "l". there are 10 sets of registers, each 8 bit. i nput data format is supposed to be 11 bits (x 10 sets ), the first 3 bits are for address and the last 8 bits are for data. each input data bit is fetched on the rising edge of xck. the contents of a register, address from 0 to 7, become valid on the falling edge of xck when both load and tadd are end image capture start image capture set parameters set an image capture mode set exposure time reset
mitsubishi integrated circuit M64283FP image sensor (artificial retina chip ) 9 / 35 specifications and information in this document are subject to change without notice. ver. 2. 2. 3 07/22/1998 semiconductor technical data mitsubishi "h", and those, address 8 and 9 , become valid on the same edge when load is "h" and tadd is "l". after all the registers have been written, image capture starts when start is input on the rising edge of xck. two modes are available for image capture, i.e., one is an accumulation mode, which accumulates the input image signal (optical signal), and an image output mode which converts the optical signal into electric al signal and output the results. when the exposure time specified by the registers c 0 and c 1 has passed, an analog image signal is output in serial. read becomes "h" when analog image signal is output . at this moment , all the register s can be rewritten because the exposure time and the image capture mode are stored in the internal control registers of the chip. when image capture has started, the image signal is supposed to be output until the chip is reset. 12.2. the programming model parameter and fun c tion symbol number of bits description image capture mode p,m,x 4bit 3 allows to select positive, negative , and edge image capture modes manually exposure time c 0 ,c 1 8bit 2 program exposure time gain g 5bit program gain of output amplifier. output pin voltage ( v ref ) v 3bit program bias voltage of output pin. enable edge enhancement /extraction mode n 1bit enable the edge enhancement /extraction mode forcibly "h" active vertical/horizontal edge extraction vh 2bit allows to select vertical edge and horizontal edge modes edge enhancement mode e 4bit set the degree of edge enhancement output inversion mode i 1bit allows to select an inversion mode "h" active enable automatic black level* calibration az 1bit enable automatic black level calibration with unfixed bias voltage "h" active. enable black level calibration z 2bit black level calibration with fixed bias voltage. enable dark pixel line output ob 1bit enable to output optical black level of dark pixel line "l" active offset voltage o 6bit allows to change offset voltage of output signal with positive/negative bias enable clamp circuit cl 1bit enable clamp circuit operation "l" active enable sample hold circuit sh 1bit enable sample & hold circuit operation "l" active enable projection px,py 2bit enable vertical/horizontal projection mode "h" active projection output control mv 5bit allows to adjust projection signal amplitude random access start address st 4bit 2 specify random access start address by (x, y) random access stop address end 4bit 2 specify random access stop address by (x', y') * black level shall be defined as output voltage from pixel in shading condition.
mitsubishi integrated circuit M64283FP image sensor (artificial retina chip ) 10 / 35 specifications and information in this document are subject to change without notice. ver. 2. 2. 3 07/22/1998 semiconductor technical data mitsubishi 12.3. register mapping register no. tadd address 7 6 5 4 3 2 1 0 0 1 000 z 1 z 0 o 5 o 4 o 3 o 2 o 1 o 0 1 1 001 n vh 1 vh 0 g 4 g 3 g 2 g 1 g 0 2 1 010 c 17 c 16 c 15 c 14 c 13 c 12 c 11 c 10 3 1 011 c 07 c 06 c 05 c 04 c 03 c 02 c 01 c 00 4 1 100 sh az cl p 3 p 2 p 1 p 0 5 1 101 px py mv 4 ob m 3 m 2 m 1 m 0 6 1 110 mv 3 mv 2 mv 1 mv 0 x 3 x 2 x 1 x 0 7 1 111 e 3 e 2 e 1 e 0 i v 2 v 1 v 0 8 0 001 st 7 st 6 st 5 st 4 st 3 st 2 st 1 st 0 9 0 010 end 7 end 6 end 5 end 4 end 3 end 2 end 1 end 0 * note. if tadd is "0", any address except 001 or 010 is prohibited. 12.4. image c apture mode register 12.4.1. image c apture mode image capture modes set by p, m , and x register s are as follows: (a) positive image mode set with the p register (b) negative image mode set with the m register (c) edge image set with the p and m registers 12.4.2. image c apture mode register users can select the sensing mode from positive, negative , and vertical edge image (one-dimensional direction) capture modes by modifying p, m , and x registers manually. each image capture mode is set by lower 4 bits of the p, m and x registers. however, for the x register, only one mode, x0 = 1 and x1 = x2 = x3 = 0 , is effective. 4 1 filter can be configured by combination of either p or m register bits and x register . figure 3 shows some configurations of p, m and x registers and filter s provided by the registers. as shown in figure 3, these filter s can scan the entire screen with p, m , and x registers. the p and m registers perform vertical setting of filter and the x register performs the horizontal setting. the p and m registers allow an output image signal to have the positive and negative polarities. a line selected by the p register multiplies an image signal by a coefficient of +1 and a line selected by the m register multiplies an image signal by a coefficient of -1. various image processing , positive, negative, and edge image s, can be achieved by the combination s of p, m, and x registers .
mitsubishi integrated circuit M64283FP image sensor (artificial retina chip ) 11 / 35 specifications and information in this document are subject to change without notice. ver. 2. 2. 3 07/22/1998 semiconductor technical data mitsubishi figure 3. filter configuration with p, m and x registers figure 4 shows an example of filter setting. to output a positive image from an origin of an image area, set 1 to the least significant bit p0 of the p register as shown in figure 4 (a). to output an edge image, set 1 to the least significant bit m0 of the m register as shown figure 4 (b). figure 5 (a), (b) and (c) show the examples of setting p, m, and x registers to output an edge image. (a) positive image (b) negative image figure 4. example of positive and negative image m register p register filter x register filter x register m register p register x register p scanner m scanner pixel area scanning direction x scanner pixel origin p register m register 4 x 1 filter x0~x3 +1 1 0 0 0 0 0 0 0 +1 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 -1 0 0 0 1 0 0 0 -1 p0~p3 m0~m3 p0 ~ p3 p0 ~ p3 m0 ~ m3 m0 ~ m3 x 0 ~ x3 x 0 ~ x3
mitsubishi integrated circuit M64283FP image sensor (artificial retina chip ) 12 / 35 specifications and information in this document are subject to change without notice. ver. 2. 2. 3 07/22/1998 semiconductor technical data mitsubishi (a) edge image 1 (b) edge image 2 (c) edge image 3 figure 5. example s of edge image m register p register x register m register p register x register x register m register p register -1 +1 0 0 0 1 1 0 0 0 -1 +1 -1 +1 1 0 0 0 -1 0 0 +1 p0 ~ p3 m0 ~ m3 x 0 ~ x3 p0 ~ p3 m0 ~ m3 x 0 ~ x3 0 1 1 0 1 0 0 1 p0 ~ p3 m0 ~ m3 x 0 ~ x3 -1 1 1 -1 1 0 0 0 0 0 1 1 1 1 0 0 -1 -1 1 1 1 0 0 0
mitsubishi integrated circuit M64283FP image sensor (artificial retina chip ) 13 / 35 specifications and information in this document are subject to change without notice. ver. 2. 2. 3 07/22/1998 semiconductor technical data mitsubishi figure 6. waveform chart of analog image signal vout (positive image output) 12.5. analog image signal control the analog image signal vout is output on the rising edge of the system clock xck. read becomes "h" when vout is output . figure 6 shows the waveforms of read, xck and vout. the output level of vout is controlled by output pin voltage specified by v register, automatic black level calibration register az (or black level calibration register z) , and offset adjustment register o . 12.5.1. output pin voltage - v register (3 bits) this register sets the output pin voltage vref. the output pin voltage is the voltage value measured on the vout pin when an analog image signal is not output. the table shown below mentions the output pin voltage vref set by the v register. note: v 2 = v 1 = v 0 = 0 is not allowed. register setting vref voltage (v) v 2 v 1 v 0 0 0 1 0.5 0 1 0 1.0 0 1 1 1.5 1 0 0 2.0 1 0 1 2.5 1 1 0 3.0 1 1 1 3.5 output of image with black level calibration and offset adjustment output of image without calibration output of image after black level calibration saturation voltage image output no image output light (saturated) dark read vout vref voffset xck v sat
mitsubishi integrated circuit M64283FP image sensor (artificial retina chip ) 14 / 35 specifications and information in this document are subject to change without notice. ver. 2. 2. 3 07/22/1998 semiconductor technical data mitsubishi 12.5.2. automatic black level c alibration register - az (1 bit) as shown in figure 6, the output voltage vout (amplitude) becomes minimum (maximum) in the dark state: the incident light is 0lx (black level ) . on the other hand, the output voltage vout becomes the same as vref in the light state: the incident light is very strong and the pixels are saturated (saturation level). the black level is calibrated so that the output amplitude is in proportion to the incident light intensity (the output amplitude becomes large as the incident light increases). as shown in figure 6, the output voltage vout, in which black level has been calibrated by biasing the saturation voltage vsat, becomes vref in the dark state , and its amplitude becomes maximum in the light state. figure 7 shows a scheme of automatic black level calibration. in this scheme, the difference voltage between the effective pixel and the dark pixel is put out . by using this circuit, shift of the saturation voltage vsat attributed to exposure time can be calibrated automatically. the automatic black level calibration is enabled in any image capture mode and work s when the az register is "h" (an initial value of az: l). figure 7. structure of automatic black level calibration circuit parameter automatic black level control az 0 disable 1 enable 128 128 pixel array vertical control circuit dark pixel column horizontal control circuit i ob vout vref az read i p i p- i ob - + - +
mitsubishi integrated circuit M64283FP image sensor (artificial retina chip ) 15 / 35 specifications and information in this document are subject to change without notice. ver. 2. 2. 3 07/22/1998 semiconductor technical data mitsubishi 12.5.3. black level calibration register - z (2 bits) the black level calibration enabled by the z register achieves the effect equivalent to the automatic black level calibration. however, the calibration bias voltage is the saturation voltage vsat at the minimum exposure time of the positive image mode . therefore, the black level is slightly shifted when the exposure time or image capture mode has changed. nothing can be set when the az register is "h" and when the automatic black level control is being executed. parameter zero point calibration z 1 z 0 0 0 no adjustment 1 0 positive image reading calibration 0 1 negative image reading calibration 12.5.4. automatic black level c alibration register - cl (clamp circuit ) as shown in figure 6, the black level of the output voltage vout in the dark state does not equal to the vref value , even after automatic black level calibration . this is caused by offset voltage of an output amplifier, non-uniformity in the internal arithmetic circuit, etc. a value of voffset varies depending on an image capture mode and setting of amplifier gain. however, by using the circuit shown in figure 8, the offset value voffset of black level can be kept to a certain fixed value. the automatic black level calibration using the clamp circuit is enabled at every image capture mode (except the random access projection output) and it works when the cl register is "l" (initial value of cl: l). to activate the clamp circuit, use both sh register (sample hold circuit) and ob register (black level output) by setting "l" simultaneously.
mitsubishi integrated circuit M64283FP image sensor (artificial retina chip ) 16 / 35 specifications and information in this document are subject to change without notice. ver. 2. 2. 3 07/22/1998 semiconductor technical data mitsubishi figure 8. automatic black level calibration circuit with clamp circuit parameter automatic black level control az sh ob 0 0 0 enable 1 1 1 disable 12.5.5. offset adjustment o register (6 bits) this register calibrates voffset, the offset voltage from the output pin voltage vref. the most significant bit o 5 is a sign bit. it can be adjusted in the positive direction and the negative direction if the most significant bit is set to "h" and "l" respectively. a maximum value shall be 0.5 v. the amplitude is controlled by 5-bit resolution. o 5 register setting range offset voltage (v) step (mv) number of steps h h 20 to h 3f 0 to 0.5 16 32 l h 00 to h 1f 0 to -0.5 16 32 12.5.6. dark pixel line output ob (1 bit) when an image is output with the ob register being "l", the first line of the image frame becomes the output signal from 128 dark pixels. adjust the o register so that this dark pixel output (optical black) level 128 x 128 pixel array vertical control circuit horizontal control circuit dark pixel column exposure time black level before after xck read v out time v out v ref v offset cl c cl vref v out v ref olx - + + -
mitsubishi integrated circuit M64283FP image sensor (artificial retina chip ) 17 / 35 specifications and information in this document are subject to change without notice. ver. 2. 2. 3 07/22/1998 semiconductor technical data mitsubishi becomes the vref value. figure 9. relation between number of valid pixels and dark pixel line parameter execution of dark pixel output ob 0 enable 1 disable 12.6. output inversion register - i (1 bit) this register selects an inversion mode when "h" is selected and a non-inversion mode when "l" is selected . 12.7. exposure time setting registers - c 0 and c 1 (8 bits 2) this register sets exposure time. total of exposure time set by both c 0 and c 1 register is the actual exposure time. c 0 register (8 bits) register setting range exposure time (msec) step ( m sec) number of steps h 00 to h ff 0 to 4.08 16 256 c 1 register (8 bits) register setting range exposure time (msec) step (msec) number of steps h 00 to h ff 0 to 1044.5 4.096 256 (origin) (vertical edge enhancement, two-dimensional edge enhancement) black level enabled black level enabled (positive image, horizontal edge enhancement) invalid pixel 128 2 invalid pixel 128 2 number of valid pixels 128 126 black level 128 1 number of valid pixels 128 125 number of valid pixels 128 128 number of valid pixels 128 127 black level 128 1 128 128 128 128 127 128 125 126 1 1
mitsubishi integrated circuit M64283FP image sensor (artificial retina chip ) 18 / 35 specifications and information in this document are subject to change without notice. ver. 2. 2. 3 07/22/1998 semiconductor technical data mitsubishi available exposure time image capture mode minimum exposure time ( m sec) maximum exposure time (sec) positive image/negative image 16 (c 0 =01,c 0 =00) 1 (c 0 =ff,c 0 =ff) horizontal edge/ horizontal edge enhancement 16 (c 0 =01,c 0 =00) 1 (c 0 =ff,c 0 =ff) vertical edge/ vertical edge enhancement 528 (c 0 =11,c 0 =00) 1 (c 0 =ff,c 0 =ff) two-dimensional edge/ two-dimensional edge enhancement 528 (c 0 =11,c 0 =00) 1 (c 0 =ff,c 0 =ff) note. when c 1 = 00h and c 0 = 00h are set , reading image pixels is done (read-only mode) without resetting every image capture mode. in this case, the clamp circuit cannot be used. 12.8. edge and edge enhancement image capture mode 12.8.1. image capture mode in addition to setting p, m and x registers individually, an edge image and edge enhancement image can be output according to n, vh and e registers. the edge enhancement image is an image that adds an original image and an edge image multiplied by a certain coefficient. horizontal edge, horizontal edge enhancement, vertical edge, vertical edge enhancement, two-dimensional edge , and two-dimensional edge enhancement mode s are available. (a) horizontal edge (b) horizontal edge enhancement figure 10. example of edge enhancement 1 (horizontal edge: original image is the same as figure 4) n vh1 vh0 e3 0 0 1 1 0 0 1 0 0 0 0 -1 2 -1 0 0 0 0 0 0 -1 3 -1 0 0 0 0 m e 0 m n p m s 0 m w 0 n vh1 vh0 e3
mitsubishi integrated circuit M64283FP image sensor (artificial retina chip ) 19 / 35 specifications and information in this document are subject to change without notice. ver. 2. 2. 3 07/22/1998 semiconductor technical data mitsubishi (a) vertical edge (b) vertical edge enhancement figure 11. example of edge enhancement 2 (vertical edge) (a) two-dimensional edge (b) two -dimensional edge enhancement figure 12. example of edge enhancement 3 (two-dimensional edge) using n, vh and e registers, a convolution of 3 x 3 size can be achieved as shown in figure 10, figure 11 and figure 12. an edge image can be obtained by taking the difference between the center pixel p and the neighbor mn, ms, mw and me. edge mode output signal number of output pixels number of valid pixels vertical edge image {(p-mn)+ (p-ms)} a 128(h) 128(v) 128(h) 126(v) horizontal edge image {(p-mw)+(p-me)} a 128(h) 128(v) 128(h) 128(v) two-dimensional edge image {(p-mn)+(p-ms)+(p-me)+(p-mw)} a 128(h) 128(v) 128(h) 126(v) vertical edge enhancement image p +{(p-mn)+(p-ms)} a 128(h) 128(v) 128(h) 126(v) n vh1 vh0 e3 1 1 0 1 1 1 0 0 n vh1 vh0 e3 n vh1 vh0 e3 1 1 1 1 1 1 1 0 n vh1 vh0 e3 0 -1 0 0 2 0 0 -1 0 0 -1 0 0 3 0 0 -1 0 0 -1 0 -1 4 -1 0 -1 0 0 -1 0 -1 5 -1 0 -1 0
mitsubishi integrated circuit M64283FP image sensor (artificial retina chip ) 20 / 35 specifications and information in this document are subject to change without notice. ver. 2. 2. 3 07/22/1998 semiconductor technical data mitsubishi horizontal edge enhancement image p +{(p-mw)+(p-me)} a 128(h) 128(v) 128(h) 128(v) two-dimensional edge enhancement image p+{( p-mn)+(p-ms)+(p-me)+(p-mw)} a 128(h) 128(v) 128(h) 126(v) a : edge enhancement ratio in the above-mentioned table, both p and m shows the intensity of output signal from the pixel. the relation between the output pixel and valid pixel is shown below: figure 13. relation between number of output pixels and number of valid pixels 12.8.2. n register (1 bit) if this register is set, the p and m registers are set for the vertical edge enhancement mode. when "h" is written , the p and m register are set automatically to "h02" and "h05" respectively. in this case , writing to both p and m registers is disabled. 12.8.3. vh register (2 bit) using this register, users can select the image capture mode from the vertical edge, horizontal edge, or two-dimensional edge modes. the edge enhancement mode uses the same edge configuration modes . parameter edge mode n vh 1 vh 0 0 0 0 no edge output 0 0 1 horizontal edge mode 1 1 0 vertical edge mode 1 1 1 two-dimensional edge mode 12.8.4. e register (4 bits) this register sets the ratio of edge enhancement ( in the table above ). the most significant bit e 3 switch es between the edge enhancement and edge mode. "h" selects the edge mode and "l" selects the 128 126 2 128 128 128 126 2 number of valid pixels - 128 x 126 number of valid pixels - 128 x 12 8 number of valid pixels - 128 x 12 6 ( vertical edge/vertical edge enhancement ) ( horizontal edge/horizontal edge enhancement ) ( two-dimensional/two-dimensional edge enhancements ) invalid pixel invalid pixel (origin)
mitsubishi integrated circuit M64283FP image sensor (artificial retina chip ) 21 / 35 specifications and information in this document are subject to change without notice. ver. 2. 2. 3 07/22/1998 semiconductor technical data mitsubishi edge enhancement mode . however, "l" should be set for the output of positive and negative image. e register sets the ratio of edge enhancement as follows: parameter ratio of edge enhancement e 2 e 1 e 0 0 0 0 0% 0 0 1 12.5% 0 1 0 25.0% 0 1 1 37.5% 1 0 0 50.0% 1 0 1 62.5% 1 1 0 75.0% 1 1 1 87.5% 12.9. projection setting 12.9.1. projection function the artificial retina chip can execute the projection of input image. the projection execute s addition of all pixels along either vertical or horizontal direction. as shown in figure 14, size and center position of an i nput image can be obtained by projecting the input image vertically and horizontally. figure 15 shows the circuit diagram of the artificial retina chip to achieve the projection. in the case of the horizontal projection, the p scanner becomes active simultaneously, and x scanner reads out the result. in the case of the vertical projection, the role of p scanner and that of the x scanner are exchanged. when projection mode is active , make the automatic black level calibration register az "h".
mitsubishi integrated circuit M64283FP image sensor (artificial retina chip ) 22 / 35 specifications and information in this document are subject to change without notice. ver. 2. 2. 3 07/22/1998 semiconductor technical data mitsubishi figure 14. principle of projection function figure 15. diagram of horizontal projection circuit pixel area horizontal projection vertical projection v p vertical control circuit horizontal control circuit dark pixel column 128 x 128 pixel array v x v out v ref az read - + - +
mitsubishi integrated circuit M64283FP image sensor (artificial retina chip ) 23 / 35 specifications and information in this document are subject to change without notice. ver. 2. 2. 3 07/22/1998 semiconductor technical data mitsubishi figure 16. diagram of vertical projection circuit 12.9.2. projection registers - px/py parameter projection mode px py 0 0 no projection 1 0 execution of horizontal projection 0 1 execution of vertical projection 12.9.3. projection output offset register - mv (5 bits) output voltage amplitude of the projection can be modified. the output voltage amplitude can be modified +/- 50% by adjusting the offset voltage by +/- 0.11 v/8 mv. specifying mv 4 as sign binary digit, users can modify the amplitude in a positive and negative direction when mv 4 is "h" and "l" respectively. horizontal control circuit 128 x 128 pixel array vertical control circuit vx vout vref az read - + - + v p
mitsubishi integrated circuit M64283FP image sensor (artificial retina chip ) 24 / 35 specifications and information in this document are subject to change without notice. ver. 2. 2. 3 07/22/1998 semiconductor technical data mitsubishi mv4 register setting range offset voltage (v) step (mv) number of steps h h 0 to h f 0 to 0.12 8 16 l h 0 to h f 0 to -0.12 8 16 12.9.4. g register (5 bits) this register set output amplifier gain. when the most significant bit g 4 is "h", the gain increases 6 db. parameter total gain (db) g 3 g 2 g 1 g 0 g 4 0 1 0 0 0 0 14.0 20.0 0 0 0 1 15.5 21.5 0 0 1 0 17.0 23.0 0 0 1 1 18.5 24.5 0 1 0 0 20.0 26.0 0 1 0 1 21.5 27.5 0 1 1 0 23.0 29.0 0 1 1 1 24.5 30.5 1 0 0 0 26.0 32.0 1 0 0 1 29.0 35.0 1 0 1 0 32.0 38.0
mitsubishi integrated circuit M64283FP image sensor (artificial retina chip ) 25 / 35 specifications and information in this document are subject to change without notice. ver. 2. 2. 3 07/22/1998 semiconductor technical data mitsubishi 12.10. random access function 12.10.1. random access the whole image is divided into 16 x 16 block areas in which minimum block consists of 8 x 8 pixels , a start block position (x, y) can be specified by the st register (8 bits) and an end block position (x', y') by the end register (8 bits). the access area is specified when coordinate data has been set to both st and end register s . to execute the random access, users can choose either positive image or projection mode. although the automatic black level calibration is av a ilable, clamp circuit is not available in this mode . therefore, the cl register must be set to "h". when the random access is executed , both read and strb are also output. 12.10.2. block diagram figure 17 shows the block diagram of the chip. the lower 4 bits of the st register indicate the x coordinate of a start block , and the higher 4 bits indicate the y coordinate of the start block (x = st [3:0], y = st [7:4]). similarly, the lower 4 bits of the end register indicate the x coordinate of an end block , and the higher 4 bits indicate the y coordinate of the end block (x' = end [3:0], y' = end [7:4]). an initial value of st and end register is 00hex when the random access starts. in this case, a ll the pixels are accessed ((x, y) = (0, 0), (x', y') = (16, 16)). the end block coordinate must be greater than the start block coordinate (x'>x or y'>y). if this condition is not satisfied, the end block coordinate becomes 16. horizontal control vertical control circuit for reset control logic vertical control circuit for reading x-scanner horizontal control circuit for reading output signal access area x =st[3:0], x ? =end[3:0] y=st[7:4], y ? =end[7:4] x=st[3:0], x ? =end[3:0] x x ? (16,16) y y ? y y ? (0,0) y=st[7:4], y ? =end[7:4] ( x,y) ( x ? ,y ? ) x x ?
mitsubishi integrated circuit M64283FP image sensor (artificial retina chip ) 26 / 35 specifications and information in this document are subject to change without notice. ver. 2. 2. 3 07/22/1998 semiconductor technical data mitsubishi figure 17. random access diagram 12.10.3. example s of area setting access ed area is specified according to parameter s for the random access mode . the start point pixel coordinate set by the st register is (8*x, 8*y) and the end point pixel coordinate is (8*x'-1, 8*y'-1). the table below shows the image area corresponding to various register setting s : parameter start block end block start pixel coordinate end pixel coordinate st end ( x,y) ( x?,y?) (x,y) x=8*x,y=8*y (x?,y?) x=8*x-1,y=8*y-1 00h 00h (0,0) (16,16) (0,0) (127,127) 00h 11h (0,0) (1,1) (0,0) (7,7) 00h 10h (0,0) (16,1) (0,0) (127,7) 00h 01h (0,0) (1,16) (0,0) (7,127) 10h 20h (0,1) (16,2) (0,8) (127,15) 01h 02h (1,0) (2,16) (8,0) (15,127) f0h 00h (0,15) (16,16) (0,120) (127,127) 0fh 00h (15,0) (16,16) (120,0) (127,127) 55h 66h (5,5) (6,6) (40,40) (47,47)
mitsubishi integrated circuit M64283FP image sensor (artificial retina chip ) 27 / 35 specifications and information in this document are subject to change without notice. ver. 2. 2. 3 07/22/1998 semiconductor technical data mitsubishi 13. example s of image c apture modes image capture mode 000 001 010 011 100 101 110 111 positive image (with dark pixel output) 8 0h 04h 0001h to ffffh (exposure time c1c0) 01h 00h 01h 03h positive image (without dark pixel output) 8 0h 04h 0001h to ffffh a1h 10h 01h 03h horizontal edge (with dark pixel output) 8 0h 24h 0001h to ffffh 41h 00h 01h c3h horizontal edge (without dark pixel output) 8 0h 24h 0001h to ffffh e1h 10h 01h c3h horizontal edge enhancement (with dark pixel output) 8 0h 24h 0001h to ffffh 01h 00h 01h 43h horizontal edge enhancement (without dark pixel output) 8 0h 24h 0001h to ffffh a1h 10h 01h 43h vertical edge (with dark pixel output) 8 0h c4h 0021h to ffffh 41h 00h 01h c3h vertical edge (without dark pixel output) 8 0h c4h 0021h to ffffh e1h 10h 01h c3h vertical edge enhancement (with dark pixel output) 8 0h c4h 0021h to ffffh 01h 00h 01h 43h vertical edge enhancement (without dark pixel output) 8 0h c4h 0021h to ffffh a1h 10h 01h 43h two-dimensional edge (with dark pixel output) 8 0h e4h 0021h to ffffh 41h 00h 01h 43h two-dimensional edge (without dark pixel output) 8 0h e4h 0021h to ffffh e1h 10h 01h 43h two-dimensional edge enhancement (with dark pixel output) 8 0h e4h 0021h to ffffh 01h 00h 01h 43h two-dimensional edge enhancement (without dark pixel output) 8 0h e4h 0021h to ffffh a1h 10h 01h 43h x projection 00h 04h 0001h to ffffh a1h 90h 01h 03h y projection (with dark pixel output) 00h 04h 0001h to ffffh a1h 40h 01h 03h y projection (without dark pixel output) 00h 04h 0001h to ffffh a1h 50h 01h 03h read-only (with dark pixel output) 8 0h 04h 0000h 01h 00h 01h 03h read-only (without dark pixel output) 8 0h 04h 0000h a1h 10h 01h 03h gain 10 times. pin voltage vref set to 1.5 v. edge enhancement ratio 50%. exposure time set by both c1 and c0 shall be set according to lighting condition. the read-only mode is for only data output without reset. if dark pixel output is not used, a clamp circuit shall be turned off.
mitsubishi integrated circuit M64283FP image sensor (artificial retina chip ) 28 / 35 specifications and information in this document are subject to change without notice. ver. 2. 2. 3 07/22/1998 semiconductor technical data mitsubishi 14. operation timing the operation timing of this chip below is described in the subsequent pages. (1) chip reset shows the timing of initial reset of logic controller. reset is executed on the rising edge of clock xck. (2) data input exposure time of image capture, initial values of scanners, vref value, and gain parameters are fetched into the register. the data (8 bits x 10) are fetched on the rising edge of system clock xck and become valid on the falling edge of xck when load is "h". (3) timing of image reading operation timing of reading an image out is shown . either p or m scanner selects the line. p ixel data are output in serial from the column selected by the x scanner. (4) timing of projection reading timing of reading horizontal and vertical projection results is shown . (5) timing for read-only mode reading is executed without setting exposure time.
mitsubishi integrated circuit M64283FP image sensor (artificial retina chip ) 29 / 35 specifications and information in this document are subject to change without notice. ver. 2. 2. 3 07/22/1998 semiconductor technical data mitsubishi add is enabled when load is "h". drive timing chart (data set) data8 data7 add0 data0 add1 data1 add2 data2 add8 data8 add9 data1 data0 00 00 00 00 xck sin load tadd xrst reset reg0 reg1 reg7 reg8
mitsubishi integrated circuit M64283FP image sensor (artificial retina chip ) 30 / 35 specifications and information in this document are subject to change without notice. ver. 2. 2. 3 07/22/1998 semiconductor technical data mitsubishi start of accumulation of 1 frame. the accumulation of 1 frame starts at 2 clock cycles after start has been input. start of output of 1 frame image start of accumulation of 2 frames. the start signal is generated at 5 clock cycles after read has been "l". (the start signal after the second frame is generated automatically by internal logic.) exposure time drive timing chart (image accumulation) xck start read vout
mitsubishi integrated circuit M64283FP image sensor (artificial retina chip ) 31 / 35 specifications and information in this document are subject to change without notice. ver. 2. 2. 3 07/22/1998 semiconductor technical data mitsubishi drive timing chart (positive image reading) p-scanner output x-scanner output vp126 xck vp0 vp1 vp127 vx0 vx1 vx2 vx3 vx4 vx5 vx6 vx7 vx125 vx126 vx127 read strb vout
mitsubishi integrated circuit M64283FP image sensor (artificial retina chip ) 32 / 35 specifications and information in this document are subject to change without notice. ver. 2. 2. 3 07/22/1998 semiconductor technical data mitsubishi drive timing chart (two-dimensional edge enhancement image reading) xck vp0 vp1 vp2 vp126 vm0 vm1 vm2 vm3 vm126 vx0 vx1 vx2 vx3 vout vx125 vx126 vx127 read vp3 vp127 vm127 strb
mitsubishi integrated circuit M64283FP image sensor (artificial retina chip ) 33 / 35 specifications and information in this document are subject to change without notice. ver. 2. 2. 3 07/22/1998 semiconductor technical data mitsubishi 0000000000000000000 fffffffffffffffff 0000000000000000000 ffff ffffffffffffffffff 0000000000000000000 drive timing chart (x projection) exposure time xck start vc[127:0] vxc0 vxc2 vxc125 1 vxc127 vp[127:0] vx0 vx1 vx2 vx3 strb vx124 vx125 vx126 vx127 vxc3 vout read
mitsubishi integrated circuit M64283FP image sensor (artificial retina chip ) 34 / 35 specifications and information in this document are subject to change without notice. ver. 2. 2. 3 07/22/1998 semiconductor technical data mitsubishi fffffffffffffffff 0000000000000000000 ffff ffffffffffffffffff 0000000000000000000 ffffffffffffffffff drive timing chart (y projection) exposure time xck start vxc[127:0] vc0 vc2 vc125 vx[127:0] vp0 vp1 vp2 vp3 strb vp124 vp125 vp126 vp127 vc1 vc3 vout read
mitsubishi integrated circuit M64283FP image sensor (artificial retina chip ) 35 / 35 specifications and information in this document are subject to change without notice. ver. 2. 2. 3 07/22/1998 semiconductor technical data mitsubishi drive timing chart (read-only mode) xck start read vout
mitsubishi integrated circuit M64283FP image sensor (artificial retina chip ) 36 / 35 specifications and information in this document are subject to change without notice. ver. 2. 2. 3 07/22/1998 semiconductor technical data mitsubishi details of revision 07/22/1998 place of revision details of revision table at page 5 typical value changed. ai dd circuit current positive image mode 2 ma ? 3 ma two-dimensional edge enhancement 50% mode 3 ma ? 3.5 ma projection mode 3 ma ? 4 ma 7th line at page 8 document corrected. register ( 8) ? register ( 10) description after 7th line at page 8 document added. if tadd is "h" ... if tadd is "l" table at page 9 document corrected. automatic black level calibration, "l" active ? automatic black level calibration, "h" active 11th line at page 14 document corrected. when the az register is "l" ? when the az register is "h" table at page 14 description modified. enable ? disable disable ? enable figure 7 at page 14 logical symbol modified. az input negative logic ? positive logic 5th line at page 15 document corrected. the az register is "l" and ? the az register is "h" and 27th line at page 17 document added. in this case, a clamp circuit cannot be used. 32th line at page 20 document added. upon executing the projection, the automatic black level calibration az register ... figure 15 at page 21 logical symbol modified. az input negative logic ? positive logic figure 16 at page 22 logical symbol modified. az input negative logic ? positive logic figure 16 at page 22 description modified. dz az
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